I think you can learn something about your audience from a list of the most-read semiconductor articles. What I learned from this year’s list is that you, like me, are obsessed with packing more and more computing power into less space. That’s a good thing because that’s also the main goal of most of the industry.
Not everything on this list fits that mold exactly, but who wouldn’t love a millimeter-scale laser tip that can slice through steel?
TSMC
1971 was a special year for many reasons. The first e-book was posted, the first one-day international cricket match was held, and this reporter was born. It was also the first time the semiconductor industry sold more than 1 trillion transistors. If TSMC executives’ predictions are correct, a single GPU will contain 1 trillion transistors within 10 years. How foundries plan to achieve such technological feats was the subject of our most-read semiconductor article this year.
Susumu Noda
Cutting steel and other optical superhero feats were, until recently, the goldmine of large carbon dioxide lasers and similarly large systems. But now centimeter-scale semiconductors have joined the party. The device, called a photonic crystal semiconductor laser (PCSEL), uses a complex array of nanometer-scale holes carefully formed inside the semiconductor to emit more energy directly from the laser. Manufactured in Japan, the PCSEL produced a beam of sliced steel with a spread of just 0.5 degrees.
intel
Inter had big ambitions at the beginning of the year. Now, things are looking less rosy. Nevertheless, the predictions in this January 2024 article came true. Intel plans to make the chip by combining two new technologies: nanosheet transistors and backside power delivery. Its main competitor, TSMC, will also soon move to nanosheets, but the foundry giant is putting backside power on the back burner. However, Intel’s plans did not completely survive contact with customers and competitors. Instead of commercializing the first version of the combo called 20A, we will skip to the next version called 18A.
Chris McKenney/Georgia Tech
Graphene has long been an interesting, but also disappointing, material for future electronics. Electrons fly through it at speeds that silicon could only hope for, captivating researchers with the potential of terahertz transistors. However, it has no natural bandgap, and giving it a bandgap has proven to be very difficult. But researchers at the Georgia Institute of Technology have tried again and have come up with a very simple way to create a semiconductor version on a silicon carbide wafer.
intel
Intel’s foundry division is looking forward to acquiring foundry customers for the 18A process. This process combines nanosheet transistors and backside power delivery, as described above. Details about what customers plan to build with this technology are sparse, but Intel executives told IEEE Spectrum that the company is working on some of these technologies in a server CPU codenamed Clearwater Forest. explained how it plans to use its advanced packaging.
david plunkert
Can anyone beat Nvidia? This is the subtext of so many articles about AI hardware, so I thought I should ask it explicitly. Answer: Probably very solid. It all depends on what you’re trying to win the company for.
iStock
In a year when the United States struck a surprise preliminary deal as part of a $52 billion effort to reinvigorate its chip-making industry, our loyal readers have been intrigued by India’s somewhat smaller moves. I had it. The government announced three deals, including the country’s first silicon CMOS factory. A key architect of India’s plan to boost chip research and development explained it all to IEEE Spectrum later this year.
Imec
Chip packaging is one of the most important aspects of continuing Moore’s Law, and is made up of many different silicon dies strung together as if they were one giant chip. system. And the most exciting thing about advanced packaging is a technology called 3D hybrid bonding. (I know this because I attended at least 20 talks on the subject at the IEEE Electronic Components Technology Conference in May 2024.) 3D hybrid bonding is a It combines chips into vertical stacks with connections so dense that they can fit millions of chips inside. square millimeters.
KEK
Just when you thought manufacturing advanced chips was already a monumental process, here’s a hint that the future will be even more bananas than the present. Current extreme ultraviolet lithography relies on a Rube Goldberg-esque procedure in which a droplet of molten tin is zapped with a kilowatt-class laser to produce a glowing ball of plasma. But future chip manufacturing will require brighter light than such systems can provide. Some say the answer is giant particle accelerators that use a high-energy physics version of regenerative braking to save energy.
tesla
Like the cowbell in a 1970s rock anthem, the computers of the future will need more silicon. how much? How about a wafer full of it? Back in April, TSMC, the world’s largest foundry, announced plans for advanced packaging and said its future pointed to wafer-scale computers. Although TSMC has technically been developing for Cerebras for some time, what it plans to deliver over the next few years will be more flexible and available to everyone. By 2027, this technology could enable systems with 40 times more computing power than today.
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