Cars, cell phones, LED holiday lights, and even credit cards all contain electronic chips made from semiconductors. These materials manipulate the flow of electricity and provide the basis for modern electronics.
For years, American investment in this critical technology has been slow, but the federal government CHIPS and scientific law We’re trying to reinvigorate it. The bill, which is expected to be passed in 2022, would allow the U.S. Department of Commerce to spend $52 billion on the semiconductor sector. To manage the research and development component of this effort, the department National Semiconductor Technology Center (NSTC)a consortium of academia, industry, government, and nonprofit organizations. Stanford University joined the NSTC in November as an academic institution conducting semiconductor-related research.
The Q&A of the Stanford report states: H.-S.Philip WongProfessor Willard R. and Professor Inez Carr Bell. Faculty of EngineeringHere’s what NSTC membership means for Stanford University and how it builds on our institutional legacy of leadership in the field.
HS Philip Wong | Provided by Stanford School of Engineering
Why is the U.S. increasing its investment in semiconductor research and development?
A semiconductor is Fundamental technology It underpins many technological advances, and economists recognize technological progress as the most important driver of economic development.
The United States also recognizes that this is important to national security. Semiconductor technology, which is essential to the daily lives of our country and its people, relies on chips just like it does everywhere else in the world. During the pandemic, we saw the auto industry come to a screeching halt due to chip shortages.
We need to have a constant supply of chips. To do this, we will a) work with like-minded allies to build a strong manufacturing ecosystem in the United States and like-minded countries and regions, and b) conduct research and development so we can continue to produce new generations. There is a need. of chips.
What is Stanford University’s role in semiconductor research?
To conduct research and make chips, you need the equivalent of a kitchen. Before the 1980s, individual professors were required to have their own kitchens. But that changed in the early ’80s, when Stanford University pioneered the concept of shared facilities to reduce the cost of chip research and provide a gathering place for researchers to generate ideas. Just like you can share your knowledge of how to cook, you can also share your knowledge of how to make chips. There are currently two complementary facilities to support researchers. Stanford Nanofabrication Facility and Stanford Nano Common Facility.
Stanford University also produces technology currently used in the industry to develop and manufacture chips, including simulation and modeling tools developed by Stanford professors. Jim Plummer and robert dutton developed. Stanford University has many other examples of research that has been implemented in industry and has had a significant impact.
How does Stanford University benefit from NSTC membership?
NSTC will award billions of dollars in research grants, and to take advantage of that funding you must become a member of the consortium. Stanford University chooses to become a member because we want to participate in research, not only to access competitive resources, but most importantly, to interact with the broader community.
NSTC plans to establish three major facilities, two of which have been announced. As members, we have access to all these facilities.
The first facility in New York will provide services for lithography, a manufacturing process that involves transferring circuit patterns onto silicon wafers that become chips. The second facility will be built near Sunnyvale, California. It will serve as the operational headquarters for NSTC, and a design research center will also be located within the facility. This location was chosen through the hard work of local businesses as well as Stanford University, Berkeley University, and other university partners who support the location. This will greatly benefit Stanford research, as many faculty members conduct research on chip design.
The yet-to-be-announced facility will be similar to Stanford University’s nanofabrication facility, but on an industrial scale, including larger, more industrially oriented, and more luxurious tools.
Is there any research currently being done that has interesting implications for future generations of chips?
Chips are always in two dimensions. We’ve been working on this concept of making three-dimensional chips.
The more transistors (nanometer-scale electrical switches) on a chip, the more functional and energy efficient the chip becomes. We’ve always wondered how we can pack more transistors into a small chip. Houses are now so small that people no longer want to live there. How can I get more living space? Now let’s go to the third dimension. Instead of cramming into a one-story house, build a taller Manhattan-style building.
Creating skyscrapers instead of 2D houses is a new type of challenge. NSTC’s facilities, especially the Design Research Center, can help meet this challenge.
What advantages do these 3D chips have over existing technologies?
You’ve probably heard that people are interested in building large data centers to train AI models. You’ve also probably heard that large data centers consume so much energy that companies need nuclear power plants. Obviously, it’s not scalable. New generations of chips should aim to reduce energy consumption for these types of applications.
The new chip also improves functionality. Look at your mobile phone. Today’s cell phones have far more features than the phones of 10 years ago. Chip improvements have made this possible.
