Morphology and electrical properties of MoS2 transistors with Pt/h-BN gate stack. (a) SEM image of a transistor with Pt/h-BN/MoS2 structure. In this structure, h-BN is grown by CVD and MoS2 is mechanically exfoliated. The length and width of the gate are 0.5 µm × 9 µm, scale bar: 2 µm. The thickness of the h-BN in this sample is about 8 nm. The source and drain electrodes are made of gold by magnetron sputtering. The output and transfer characteristics of the FET devices are shown in (b) and (c). (d) Optical microscope image of an all-CVD transistor with Pt/h-BN/MoS2 gate stack, scale bar: 25 µm. (e) Transfer characteristics in darkness and illumination of 20 devices like in panel (d), confirming their successful use as photodetectors. The low current (caused by the non-optimized Schottky contacts between the MoS2 channel and the Au source/drain electrodes) also helps to reduce power consumption in this application. (e) When the gate current density vs. gate voltage of the same 20 devices in panel (e) was measured, no gate leakage current was detected. Credit: Shen et al.
Two-dimensional (2D) semiconductor materials possess unique optoelectronic properties that could be advantageous for the development of ultrathin and tunable electronic components. Despite their advantages over bulk semiconductors, optimally bonding these materials with gate dielectrics has proven challenging to date, often resulting in interface traps that rapidly degrade transistor performance.
Researchers from King Abdullah University of Science and Technology (KAUST), Soochow University, and other laboratories around the world recently presented an approach that could enable the fabrication of higher-performance transistors based on 2D semiconductors. Their proposed design, outlined in a paper in Nature Electronics, uses a hexagonal boron nitride (h-BN) dielectric and a high-cohesive energy metal gate electrode.
“We initially discovered that using platinum (Pt) as the anode made the h-BN stack less likely to experience dielectric breakdown,” Yaqing Shen, first author of the paper, told Tech Xplore. “Based on this discovery, we designed experiments and found that the Pt/h-BN gate stack exhibited 500 times lower leakage current than the Au/h-BN gate stack, and a higher dielectric strength of at least 25 MV/cm. This gave us the idea to use CVD h-BN as the gate dielectric in 2D transistors.”
Shen, Professor Mario Lanza and colleagues have fabricated over 1,000 devices using chemically vapor-deposited h-BN as the dielectric, and when evaluating these devices, they found that the h-BN gate dielectric is most compatible with high cohesive energy metals such as Pt and tungsten (W).
“To fabricate transistors with a vertical Pt/h-BN/MoS2 structure, we started by cleaning a SiO2/Si substrate using an ultrasonic bath of acetone, alcohol, and deionized water,” explains Shen. “Source and drain electrodes (Ti/Au) were patterned on this substrate using e-beam lithography and deposited by e-beam evaporation. MoS2 was then exfoliated from its native crystal and transferred onto these electrodes to form the channels. A CVD h-BN film was transferred onto this structure by wet transfer.”
As the final step in the transistor fabrication process, the researchers used electron beam lithography to pattern the Pt gate electrode, then deposited it using a technique called electron beam evaporation. The clean van der Waals interface between the MoS2 and h-BN in the team’s transistors improves the transistor’s reliability and performance, minimizing defects and enhancing gate control.
“Contrary to the perception that CVD h-BN is insufficient as a gate dielectric, we found that it can be effectively used in field-effect transistors with MoS2 channels by selecting the appropriate metal electrode,” said Shen. “MoS2 and h-BN form a clean van der Waals interface, enhancing reliability. Our results demonstrate that with high cohesive energy metals such as Pt and W, CVD h-BN can be an effective gate dielectric in 2D transistors.”
The research team’s 2D semiconductor-based transistor fabrication method has so far proven very promising, reducing current leakage and providing high dielectric strength of at least 25 MV cm-1. Initial tests have revealed that Pt- and W-based gate electrodes reduce the leakage current of the h-BN dielectric by about 500 times compared to similar transistors using gold (Au) electrodes.
The recent work by Shen and colleagues may advance the use of 2D materials for the fabrication of reliable solid-state microelectronic circuits and devices. Other research groups may soon explore similar approaches and materials, which could lead to the development of even higher-performance 2D semiconductor-based devices.
“As the next step in our research, we plan to develop ultra-small (nanoscale) fully 2D transistors that can help extend Moore’s Law,” Shen added. “We also aim to solve the contact problem between the 2D channel and the electrodes to improve device performance.”
Further information: Yaqing Shen et al. “Two-dimensional material-based transistors using hexagonal boron nitride dielectric and high cohesive energy metal gate electrode.” Nature Electronics (2024). DOI: 10.1038/s41928-024-01233-w
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